Basic gates: AND, OR, NOT and BUFFER

A gate is a function of every input combination

For inputs $a,b\in\{0,1\}$, AND outputs 1 when both are 1; OR outputs 1 when at least one is 1. NOT inverts^{iInversion The NOT operation, which changes 0 to 1 and 1 to 0. A bar over an expression applies NOT to the entire expression beneath it. Learn more} its input, and BUFFER passes the logic value through unchanged. A physical BUFFER also has drive strength and delay; here we consider only its logical function.

Boolean algebra^{iBoolean algebra Algebra of 0, 1, AND, OR and NOT. The plus sign usually denotes OR here, whose rules differ from integer addition. Learn more} writes AND as $ab$, OR as $a+b$, and NOT as $\overline a$. Thus $1+1=1$ here is not integer addition. The same operations are also written $a\land b$, $a\lor b$ and $\neg a$.

Read the symbol, inputs and truth table together

Select AND and OR below and check all four inputs: 00→01→10→11. Compare AND's flat input side and rounded output side with OR's curved input side. NOT indicates inversion with a small circle at the tip of a triangle; BUFFER is a triangle without that circle. These are common logic symbols; some standards use rectangular symbols instead.

OR means “at least one,” not “exactly one.” When both inputs are 1, OR outputs 1 while XOR, introduced in the next lessons, outputs 0. Missing even one truth-table^{iTruth table A table listing every possible input combination and its output. Changes over time are checked separately with waveforms.} row can hide this distinction.

Connect conditions to form a circuit

A circuit that produces an output when permission $e$ is present and at least one of sensors $a,b$ is active is

First, OR produces $a+b$; AND then combines it with $e$. When $e=0$, the output is 0 regardless of the sensors. Three inputs have $2^3=8$ combinations, so compare the specification and implementation in all eight truth-table rows.

Basic rules for reading RTL operators

a & b, a | b and ~a are bitwise AND, OR and NOT. For vectors a=0010 and b=0100, a & b=0000, but the logical condition a && b is 1 because both vectors are nonzero. Unary &a reduces all bits with AND. Bitwise, logical and reduction operators have different result widths and meanings.

A truth table describes values after the inputs settle. Correct symbols and equations do not eliminate propagation delay^{iPropagation delay The time from an input change until the output settles to the correct value. Logical equivalence and timing behavior are separate properties. Learn more} or momentary glitches.