Digital Logic Circuits
Start with digital signals and logic gates such as AND, OR and XOR, then design combinational circuits, latches, flip-flops, counters and state machines. Connect truth tables, equations, circuits and waveforms directly, and verify your designs in RTL labs. The optional advanced chapters extend the course to datapaths and interfaces.
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RTL Design Fundamentals
Express digital circuits in SystemVerilog. Work through types, widths, signedness, combinational and sequential logic, modules, parameters and generate constructs, then verify boundaries and failures with independent testbenches. Finish by composing a periodic-pulse accumulator and recording reproducible execution evidence.
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RTL Design: Datapaths & Pipelines
Specify numeric and cycle contracts, then design an ALU, controller, pipeline, and ready-valid buffering. Four runnable reference-model labs check arithmetic boundaries, stalls, FIFOs, and ordering before a streaming-compute capstone.
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RTL Design: Systolic Arrays
Build a parameterized matrix multiplication array from signed MAC arithmetic, input skew and processing elements, then verify tiling, flow control and exact edge-by-edge behavior.
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RTL Design: CNN Accelerators
Learn convolution indexing and integer numerical contracts, then streaming windows, PE mapping and tiling. Verify a runnable reference and a small inference path while separating values, schedule estimates and traffic.
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Analog Circuit Design
Build a practical foundation in low-voltage analog design: solve DC networks, predict transient and frequency response, bias transistors, design feedback amplifiers and filters, and verify a sensor signal path with explicit model limits.
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