Altifigence Academy

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Comparators and boundary specifications

Distinguish unsigned and signed comparisons of the same bits, and verify boundary conditions.

The highest differing bit determines magnitude

Compare two unsignedUnsigned A rule for interpreting a bit pattern as a nonnegative integer. The n-bit range is 0 through 2^n−1 and may differ from the signed interpretation of the same bits. Learn more vectors from the MSBMSB The bit with the highest place value. Its index depends on the vector's declaration direction, so do not assume it always has the largest index. Learn more downward and find the first differing bit. The value with a 1 there is larger. With ei=ai⊕bi‾e_i=\overline{a_i\oplus b_i}, the four-bit greater-than condition is

gt⁡(a,b)=a3b‾3+e3a2b‾2+e3e2a1b‾1+e3e2e1a0b‾0\operatorname{gt}(a,b)=a_3\overline b_3+e_3a_2\overline b_2+e_3e_2a_1\overline b_1+e_3e_2e_1a_0\overline b_0

Here, gt⁡(a,b)\operatorname{gt}(a,b) is the Boolean comparison result. A lower-position comparison matters only when all higher bits agree. Equality is the AND of all eie_i.

Signed comparison interprets the sign first

4'b1111 and 4'b0001 are unsigned 15 and 1, but signed -1 and 1. With differing signs, the negative value is smaller. The difference between logic [3:0] and logic signed [3:0] is the interpretation used by operations, not storage capacity.

SystemVerilog
logic [3:0] a, b;
logic unsigned_lt, signed_lt;
assign unsigned_lt = a < b;
assign signed_lt = $signed(a) < $signed(b);

This code uses operands of equal width. If widths differ, first choose the extension width before applying a simple cast.

The same two bit patterns can reverse order under different signedness contracts. Do not apply the unsigned highest-bit comparison rule directly to signed values.

Choose an interpretation before comparing bits
  1. 1111 vs 0001: The same four-bit inputs
  2. Unsigned: 15 is greater than 1
  3. Signed: −1 is less than 1

State boundary conditions in words

For a buffer that holds 16 items, count==16 means full and count<16 means another item can be stored. A four-bit count cannot represent 16, so the full condition itself fails. This is why both comparator behavior and the representable range of its operands must be reviewed.

For threshold TT, first check T−1,T,T+1T-1,T,T+1, handling values outside the representable range separately. Construct tests that deliberately distinguish < from <=. Comparing only the value after unsigned wraparound cannot recover a carry that has already been lost.

Try it yourself

How many bits does a FIFO occupancy count from 0 through 16 need? Can a comparison expression alone determine whether simultaneous pop and push are permitted when full?

Read the explanation

There are 17 values, so five bits are required. Whether a simultaneous pop makes room for a push is an interface policy. Using only count < 16 can block replacement when full; to allow it, the actual pop acceptance condition must also be included.

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