State changes in a shift register

Insert a new bit and move the old ones

A shift register moves bits by one position at a clock edge. This example feeds a serial input, din, into a three-bit register q.

q <= {q[1:0], din}; concatenates the previous two low bits with din. The old q[2] is discarded, and din becomes the new q[0].

After reset to 000, input bits 1, 0, 1, 1 produce 001, 010, 101, 011. Each edge computes from the value before the update.

With q=101 and din=1, which bits remain and which bit is discarded?