Altifigence Academy

34 / 36 · Concept

Design a small state machine

Describe state, input and next state in a transition table.

Learning goals

  • Write a state transition table.
  • Separate current state from next state.

State represents what the circuit must remember.

A controller that accepts a request and waits for completion can use IDLE and BUSY. In IDLE, start=1 enters BUSY; in BUSY, done=1 returns to IDLE.

Define simultaneous inputs too. Here IDLE considers only start and BUSY only done. Reset returns to IDLE.

Current stateConditionNext state
IDLEstart=0IDLE
IDLEstart=1BUSY
BUSYdone=0BUSY
BUSYdone=1IDLE

Compute the next state, then store it at an edge.

Combinational logic computes next_state; always_ff stores state<=next_state at the clock edge. A Moore output depends only on state; a Mealy output also depends on current inputs.

Using unsynchronized signals from another clock domain is outside this example. All inputs here are assumed stable relative to the same clock.

Try it yourself

If the current state is BUSY, start=1 and done=0, what is next?

Read the explanation

It remains BUSY; only done controls the transition in that state.

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