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Specify the selection with a truth table
List every input combination and define its expected output.
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Learning goals
- Enumerate every combination of three inputs
- Check that changing the unselected input does not change the output
Fix the selection rule first
Three one-bit inputs have 2 × 2 × 2 = 8 combinations. Write columns in the order a, b, sel. Copy a to the output for sel=0 and b for sel=1. This is the reference for your code.
When both data inputs match, changing sel leaves y unchanged. Testing only those cases can miss a reversed selection rule.
| a | b | sel | Expected y |
|---|---|---|---|
| 0 | 0 | 0 | 0 |
| 0 | 0 | 1 | 0 |
| 0 | 1 | 0 | 0 |
| 0 | 1 | 1 | 1 |
| 1 | 0 | 0 | 1 |
| 1 | 0 | 1 | 0 |
| 1 | 1 | 0 | 1 |
| 1 | 1 | 1 | 1 |
Vary the unselected input
Keep sel=0 and a=1, then change b from 0 to 1. y should stay at 1. If b affects the output while sel=0, the circuit does not match this MUX specification.
This table specifies the combinational output y. Checking sampled_y also requires the clock-edge timing. Keep selection rules distinct from the timing of storage.
Try it yourself
Which case reveals a reversed selector: a=0, b=0 or a=0, b=1?
Read the explanation
Use a=0, b=1. sel=0 should produce 0 and sel=1 should produce 1, so a reversal becomes visible.