Combinational RTL and complete assignments

Present inputs determine a combinational circuit's output

The most direct MUX^{iMultiplexer A combinational circuit that connects one of several inputs to the output according to a select signal. Specify how select bits map to input numbers. Learn more} expression is assign y = sel ? b : a;. Use always_comb when calculating multiple outputs together.

always_comb begin
  y = a;
  if (sel) y = b;
end

The initial default assignment defines the sel=0 path too. If only if (sel) y = b; remains, sel=0 requires retaining the previous y, so the block no longer describes a purely combinational function. Do not ignore tool warnings or rely on the always_comb keyword alone.

Assigning y=a by default and selecting b only for sel=1 implements the same 0/1 combinational function as the circuit below. The output is fully determined for sel=0 as well.

Do not read procedural syntax only as software execution order

Combinational blocks generally use blocking assignment = for intermediate results. When a later expression reads a result assigned earlier in the same block, the dependency becomes a combinational path. Distinguish this from nonblocking^{iNonblocking assignment An assignment written as <= in sequential RTL. It evaluates the right-hand side and schedules the update, allowing registers at the same edge to compute from the previous state. Learn more} assignment <=, used to update sequential registers^{iRegister A circuit that stores multiple bits of state. The synchronous registers in this course store their specified inputs at a clock edge. Learn more}.

always_comb begin
  next_y = sel ? b : a;
  inverted_y = ~next_y;
end

Another basic rule is not to drive one output from multiple blocks. As modules are divided, track the sole driver of each signal through the interface.

Match unequal data widths first

When selecting between eight-bit and twelve-bit data, specify y's width and sign extension. Decide input ranges during design instead of accidentally discovering in a waveform whether implicit extension matches your intention. Outside the 0/1 model, a conditional operator with sel=X can differ from a simple if, so do not generalize this course's two-state results to all four-state behavior.