Altifigence Academy

8 / 37 · Concept

Two's complement, sign extension and overflow

Use equations and counterexamples to distinguish signed bit-pattern interpretation from addition overflow.

The most significant bit has a different weight

An NN-bit two's-complementTwo's complement A representation of signed integers using fixed-width bit patterns. The n-bit range is −2^(n−1) through 2^(n−1)−1. integer is interpreted as

s=−bN−12N−1+∑i=0N−2bi2is=-b_{N-1}2^{N-1}+\sum_{i=0}^{N-2}b_i2^i
−2N−1≤s≤2N−1−1-2^{N-1}\le s\le 2^{N-1}-1

Four-bit 1010 is unsignedUnsigned A rule for interpreting a bit pattern as a nonnegative integer. The n-bit range is 0 through 2^n−1 and may differ from the signed interpretation of the same bits. Learn more 10 but signed -6. It is not a sign bit followed by an absolute value. At a fixed width, −x-x is formed by bitwise inversionInversion The NOT operation, which changes 0 to 1 and 1 to 0. A bar over an expression applies NOT to the entire expression beneath it. Learn more followed by adding 1, but the positive counterpart +8 of the minimum -8 is outside the same four-bit signed range.

Extension must preserve the value

Unsigned extension fills the new upper bits with 0; signed extension repeats the existing sign bit. Extending 1010 to 00001010 gives +10, while 11111010 gives -6. Widening the same bits requires different circuitry for different interpretations.

SystemVerilog
logic signed [3:0] a, b;
logic signed [4:0] exact;
logic [3:0] result;
logic overflow;
assign exact = {a[3], a} + {b[3], b};
assign result = exact[3:0];
assign overflow = (a[3] == b[3]) && (result[3] != a[3]);

This example adds two signed operands without a carry input. It preserves the five-bit sum in exact and checks whether the narrowed result has the correct sign.

The initial pattern below is 11111010. Confirm that unsigned 250 and signed −6 share the same bits. Toggling b7 changes the two interpreted values in opposite directions.

Reading signedness from the same eight bits

11111010 → unsigned 250 · signed -6 · hex 0xFA

Carry and signed overflow are different

V=aN−1⊕bN−1‾ (sN−1⊕aN−1)V=\overline{a_{N-1}\oplus b_{N-1}}\,(s_{N-1}\oplus a_{N-1})

Overflow occurs when adding operands with the same sign produces the opposite result sign. In four bits, 7+37+3 is stored as 1010, appearing as -6; −8+(−1)-8+(-1) is stored as 0111, appearing as +7. Adding two values with different signs cannot produce this range overflow.

Mixing signed and unsigned values in RTL expressions makes comparison and extension rules easy to confuse. Specify both operand widths and signedness, and include the minimum, -1, 0 and maximum in boundary tests.

Try it yourself

For four-bit signed arithmetic, find the stored bit patterns and overflow for −3+(−4)-3+(-4) and 5+55+5. Also explain the result of negating −8-8.

Read the explanation

−7-7 is 1001, without overflow. The value 10 is out of range and is stored as 1010 (-6), so overflow occurs. Inverting -8 and adding 1 leaves 1000 again because +8 is unrepresentable. Do not use this as a valid absolute-value calculation.

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