5 / 20 · Concept
The contract at one rising edge
Fix edge numbering, registered forwarding, accumulation and initialization priority.
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The time convention used throughout this course
Reset and clear finish before E0, the first rising edge that consumes data. Inputs are stable immediately before E_t. At that edge, a PE accumulates a product from its pre-edge inputs and stores those same inputs in its rightward and downward forwarding registers. New accumulator and forwarding values are observable immediately after E_t. A neighbor consumes the registered values at E_(t+1).
This baseline has no separate input register, pipelined multiplier or output serialization stage. Adding one requires revisiting the schedule and result latency. “A result at edge zero” means the updated accumulator after E0, not before it. Initialization edges are excluded from compute-edge counts. Clear has priority over MAC, so asserting clear with the first data pair discards that pair; clear first and feed data at the following edge.
Two responsibilities in one PE
With A=1 and B=5 at E0, PE(0,0) updates its accumulator to five and forwards the operands into registers. At E1, boundary operands 2 and 7 add fourteen, producing nineteen. At that same edge, neighboring PEs may consume the first registered operands. Allowing a token to cross two PEs within one edge would invalidate our later skew equations.
Nonblocking assignments express this pre-edge/read, post-edge/write behavior. A testbench must also sample consistently after the state update, using a suitable clocking block or simulator sampling region. Do not depend on the accidental ordering of active-region processes.
Priority and a global pause
The priority is reset, then clear, then advance. Reset and clear empty accumulators and valid state. When advance=0, every PE holds its accumulator, forwarding values, valid flags and tags. The boundary scheduler also holds. One advance edge performs one logical step. A valid zero is a real operand; an invalid token is ignored regardless of its data bits.
If an accumulator equals five and the array pauses for two physical edges, it remains five. The next advance edge performs the next logical step. Report physical clock edges separately from logical advance steps. Initialization still takes effect during a pause, preventing stale tokens from leaking into the next job.
Try it yourself
Clear finishes at E−1. Consume (1,5) at E0, pause at E1, and consume (2,7) at E2. Give the post-edge accumulator and logical-step numbers.
Read the explanation
After E0, acc=5 and logical step zero has completed. E1 holds acc=5. After E2, acc=19 and logical step one has completed. There were three physical edges and two advance edges.