Course 02 · SystemVerilog
Sequential logic & clocks
Circuits that change over time. Explore clocks, resets and state with a counter.
Beginner1 lab25 minFree learning materials
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01 / Learning material
What you will learn
- Understand rising edges and registers
- Observe a synchronous reset
- Compare the wraparound sequence of a two-bit counter
02 / Course guide
Before you begin
A short, guided SystemVerilog lab. Prepare a Digital Design Studio Desktop project and the permissions to run it.
Installation & first launch ↗Recommended firstCombinational logic ↗
Course outline