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Course 01 · SystemVerilog

Combinational logic

From input to output. Build a MUX and learn how a circuit selects a value.

Beginner1 lab20 minFree learning materials
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Read the code → run it → compare the result.

01 / Learning material

What you will learn

  • Describe inputs and outputs in SystemVerilog
  • Compare outputs as the MUX select signal changes
  • Distinguish a combinational output from a clocked value

02 / Course guide

Before you begin

A short, guided SystemVerilog lab. Prepare a Digital Design Studio Desktop project and the permissions to run it.

Installation & first launch ↗
A good place to start.

Course outline

Course outline

01Choose an input with a MUXSee how a combinational output differs from a clocked value.20 min