Hardware per IAIn preparation
RTL Design: Systolic Arrays
Connect multiply-accumulate processing elements into an array and design a small matrix multiplication accelerator.
Matrix multiplicationMACDataflow
Che cosa imparerai
- Understand fixed-point arithmetic and accumulator width
- Design a reusable processing element
- Schedule array inputs and outputs
- Analyze data reuse and memory bandwidth
Corso propedeutico consigliato
RTL Design: Datapaths & Pipelines ↗Programma
- Matrix multiplication and fixed point
- MAC processing elements
- Arrays and data scheduling
- Buffering and result checks