Altifigence Academy
Matériel d’IAIn preparation

RTL Design: Systolic Arrays

Connect multiply-accumulate processing elements into an array and design a small matrix multiplication accelerator.

Matrix multiplicationMACDataflow

Ce que vous apprendrez

  • Understand fixed-point arithmetic and accumulator width
  • Design a reusable processing element
  • Schedule array inputs and outputs
  • Analyze data reuse and memory bandwidth

Cours préalable recommandé

RTL Design: Datapaths & Pipelines ↗

Programme

  1. Matrix multiplication and fixed point
  2. MAC processing elements
  3. Arrays and data scheduling
  4. Buffering and result checks

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