Altifigence Academy
Digitales DesignIn preparation

RTL Design: Datapaths & Pipelines

Build a small computing system by connecting arithmetic and control, then explore pipelined execution.

DatapathsPipelinesControl

Das wirst du lernen

  • Separate the datapath from control state
  • Design data transfers and wait conditions
  • Compare pipeline latency and throughput
  • Check a system with buffers and boundary conditions

Empfohlener Vorkurs

RTL Design Fundamentals ↗

Lehrplan

  1. Arithmetic and datapaths
  2. State machines and control
  3. Pipeline stages and data transfer
  4. Buffers, throughput and boundary conditions

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